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S6 - 記憶卡控制IC

 
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S6 解決方案 - 消費性快閃記憶卡
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S 6 - 記憶卡控制IC
S6 - 記憶卡控制IC
Hyperstone 的S6記憶卡控制IC及其具備的韌體與應用程式，為適用MMC4.2及SD 2.0界面的高可靠性與處理能力的記憶卡解決方式，提供了一個易於使用及一應俱全的解決方式及平臺。 
  • 取得專利的平均損耗演算法(wear-leveling)技術與ECC技術，確保高可靠性與耐用度。
  • 最佳化32 Bit RISC 核心，指令集和韌體，適用於快閃記憶體處理技術。
  • 擁有DFA(Dual channel Direct Flash Access unit)技術，包含交錯處理模式的暫存區。
  • 廣大的暫存區，得以擁有最高的MLC處理效率。
  • 最低功耗設計，兼具節能功能。
  • 只需透過簡單的韌體更新，不必更換硬體，即可擁有智慧型與客製功能。
  • 附加的UART可連結如安全控制器(security controller)等外接裝置。
  • ASSP不再需要外接穩壓器，檢測器或者二極體。
  • Turnkey solution包括韌體、治具、測試和研發硬體及SD或MMC卡的參考電路。
主要應用
  • SecureDigitialTM - SD Cards for industrial and consumer applications
  • microSD cards for consumer and mobile applications
  • MultiMediaCardsTM (MMC)
  • eMMC embedded Flash
  • Multi-Chip-Packages (MCP)
  • SmartCards
產品資訊
  • S6-LAK05 --- LGA 54, RoHS, -25 to +85 °C
  • S6-0ABD0 --- KGD / Wafer
相容性及效能
  • Fully compliant to SD 1.01, 1.10, and 2.0 standards
  • Fully compliant to MMC 3.31, 4.1, and 4.2 standards
  • 2 times 4KB large page buffers achieving optimal performance for SLC and MLC flash chips with 4KB page size
  • Sustained read and write up to 24 and 23 MB/s respectively using SLC in SD mode
  • Sustained read and write up to 22 and 9 MB/s respectively using MLC in SD mode
  • Sustained read and write up to 42 and 25 MB/s respectively using SLC in MMC mode
  • Sustained read and write up to 42 and 9 MB/s respectively using MLC in MMC mode
  • Data transfer rate to flash-memory of up to 40MB/s per channel
中央處理單元
  • High performance 32-Bit Hyperstone RISC microprocessor
  • 10 to 60 MHz clock frequency using adjustable internal oscillator
  • 16 KB internal Boot ROM
  • 20 KB internal RAM
  • Card operation current of less than 25 mA
  • Automatic power-down mode during wait periods, power saving mode incl. automatic wake-up and sleep mode with Icc < 120 µA
  • Dual supply voltage 1.8V and 3.3V
  • On-chip voltage regulator for 1.8V and charge pump for 3.0V flash memory power supply
  • On-chip voltage regulator for 1.8V processor core supply
  • Internal voltage detector
  • Optimized die size, shape and pad layout for multi die packages and die stacking
主機介面與相容性
  • Fully compliant to the SD 1.01, 1.10 and 2.0 (SDHC) standards
  • Fully compliant to MMC 3.31, 4.1 and 4.2 standards
  • Additional General Purpose UART and optional ISO 7816-3 interface
快閃記憶體介面與處理能力
  • Dual channel direct flash memory access (DFA)
  • Supporting all control signal for NAND type flash memory connection
  • Supporting direct connection of up to 4 flash memory chip enables (CE) - 2 per channel
  • 2 times 4KB large page buffers achieving optimal performance for SLC and MLC flash chips with 4KB page size
  • Flash memory power down logic and flash memory write protect control
  • Error Correcting Code (ECC) capable of correcting 4 symbols in a 512 Bytes sector with additional CRC
  • Supporting all current and future vendor flashes and technologies (NAND, AG-AND, MLC/SLC, NROM, ...) by firmware upgrades
  • Firmware storage in flash memory
  • Firmware is loaded into internal memory by the boot ROM
  • Flash management including mapping of logical block addresses (LBA) to corresponding physical block addresses (PBA)
  • Bad Block Management
  • Wear leveling
  • Power Loss Protection
  • Interleaving, cache, and multi-plane programming
    ... and many more